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ltc3526/ltc3526b 3526bfd typical a pplica t ion a pplica t ions fea t ures descrip t ion 500ma 1mhz synchronous step-up dc/dc converters in 2mm 2mm dfn the ltc ? 3526/ltc3526b are synchronous, fixed frequency step-up dc/dc converters with output disconnect. syn- chronous rectification enables high efficiency in the low profile 2mm 2mm dfn package. battery life in single aa/aaa powered products is extended further with an 850mv start-up voltage and operation down to 500mv once started. a switching frequency of 1mhz minimizes solution foot- print by allowing the use of tiny, low profile inductors and ceramic capacitors. the current mode pwm design is internally compensated, reducing external parts count. the ltc3526 features automatic burst mode operation at light load conditions, while the ltc3526b features continuous switching at light loads. anti-ringing control circuitry also reduces emi concerns by damping the inductor in discon- tinuous mode. additional features include a low shutdown current of under 1a and thermal shutdown. the ltc3526/ltc3526b are housed in a 2mm 2mm 0.75mm dfn package. for new designs, we recommend the ltc3526l/ltc3526lb. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. n medical instruments n flash-based mp3 players n noise canceling headphones n wireless mice n bluetooth headsets n delivers 3.3v at 100ma from a single alkaline/ nimh cell or 3.3v at 200ma from two cells n v in start-up voltage: 850mv n 1.6v to 5.25v v out range n up to 94% efficiency n output disconnect n 1mhz fixed frequency operation n v in > v out operation n integrated soft-start n current mode control with internal compensation n automatic burst mode ? operation with 9a quiescent current (ltc3526) n low noise pwm operation (ltc3526b) n internal synchronous rectifier n logic controlled shutdown (i q < 1a) n anti-ringing control n low profile (2mm 2mm 0.75mm) dfn package sw v in 1.78m 4.7h 1m 1f 4.7f 3526 ta01a ltc3526 shdn v out fb v in 1.6v to 3.2v v out 3.3v 200ma off on gnd load current (ma) 0.01 40 efficiency (%) power loss (mw) 50 60 70 80 0.1 1 10 100 1000 3526 ta01b 30 20 10 0 90 100 1 10 100 0.1 0.01 1000 efficiency power loss v in = 2.4v ltc3526 efficiency and power loss vs load current not recommended for new designs contact linear technology for potential replacement
ltc3526/ltc3526b 3526bfd v in voltage ................................................... C0.3v to 6v sw voltage dc ............................................................ C0.3v to 6v pulsed <100ns ......................................... C0.3v to 7v shdn , fb voltage ........................................ C0.3v to 6v v out ............................................................. C0.3v to 6v operating temperature range (note 2) ...C40c to 85c storage temperature range .................. C65c to 150c (note 1) the l denotes the specifications which apply over the specified operating temperature range of C40c to 85c, otherwise specifications are at t a = 25c. v in = 1.2v, v out = 3.3v unless otherwise noted. parameter conditions min typ max units minimum start-up input voltage i load = 1ma 0.85 1 v output voltage adjust range 0c to 85c l 1.7 1.6 5.25 5.25 v v feedback pin voltage l 1.165 1.195 1.225 v feedback pin input current v fb = 1.30v 1 50 na quiescent currentshutdown v shdn = 0v, not including switch leakage, v out = 0v 0.01 1 a quiescent currentactive measured on v out , nonswitching, ltc3526 only 250 500 a quiescent currentburst measured on v out , fb > 1.230v 9 18 a n-channel mosfet switch leakage current v sw = 5v 0.1 5 a p-channel mosfet switch leakage current v sw = 5v, v out = 0v 0.1 10 a n-channel mosfet switch on resistance v out = 3.3v 0.4 p-channel mosfet switch on resistance v out = 3.3v 0.6 n-channel mosfet current limit l 500 700 ma current limit delay to output (note 3) 60 ns maximum duty cycle v fb = 1.15v l 85 90 % minimum duty cycle v fb = 1.3v l 0 % switching frequency l 0.7 1 1.3 mhz shdn pin input high voltage 0.9 v shdn pin input low voltage 0.3 v shdn pin input current v shdn = 1.2v v shdn = 3.3v 0.3 1 1 2 a a top view v out fb shdn sw gnd v in dc package 6-lead (2mm 2mm) plastic dfn 7 1 2 3 6 5 4 t jmax = 125c, ja = 102c/w (note 6) exposed pad (pin 7) is gnd, must be soldered to pc board o r d er i n f orma t ion lead free finish tape and reel part marking package description temperature range ltc3526edc#pbf ltc3526edc#trpbf lchw 6-lead (2mm 2mm) plastic dfn C40c to 85c ltc3526bedc#pbf ltc3526bedc#trpbf lcnn 6-lead (2mm 2mm) plastic dfn C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ p in c on f igura t ion a bsolu t e m aximum r a t ings e lec t rical c harac t eris t ics
ltc3526/ltc3526b 3526bfd note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3526e is guaranteed to meet performance specifications from 0c to 85c. specifications over C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: specification is guaranteed by design and not 100% tested in production. note 4: current measurements are made when the output is not switching. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. note 6: failure to solder the exposed backside of the package to the pc board ground plane will result in a thermal resistance much higher than 102c/w. efficiency vs load current and v in for v out = 1.8v (ltc3526) efficiency vs load current and v in for v out = 3.3v (ltc3526) efficiency vs load current and v in for v out = 5v (ltc3526) no-load input current vs v in maximum output current vs v in minimum load resistance during start-up vs v in load current (ma) 0.01 40 efficiency (%) power loss (mw) 50 60 70 80 0.1 1 10 100 1000 3526 g01 30 20 10 0 90 100 1 10 100 0.1 0.01 1000 v in = 1.0v v in = 1.2v v in = 1.5v ploss at v in = 1.0v ploss at v in = 1.2v ploss at v in = 1.5v load current (ma) 0.01 40 efficiency (%) power loss (mw) 50 60 70 80 0.1 1 10 100 1000 3526 g02 30 20 10 0 90 100 1 10 100 0.1 0.01 1000 v in = 1.2v v in = 1.8v v in = 2.4v v in = 3.0v ploss at v in = 1.2v ploss at v in = 1.8v ploss at v in = 2.4v ploss at v in = 3.0v v in (v) 0.5 i in (a) 60 70 80 4.5 3526 g04 50 40 10 1.5 2.5 3.5 1.0 2.0 3.0 4.0 30 20 100 90 v out = 3.3v v out = 5v v out = 2.5v v out = 1.8v load current (ma) 0.01 40 efficiency (%) power loss (mw) 50 60 70 80 0.1 1 10 100 1000 3526 g03 30 20 10 0 90 100 1 10 100 0.1 0.01 1000 v in = 1.2v v in = 2.4v v in = 3.6v v in = 4.2v ploss at v in = 1.2v ploss at v in = 2.4v ploss at v in = 3.6v ploss at v in = 4.2v v in (v) 0.5 i out (ma) 200 300 4.5 3526 g05 100 0 1.5 2.5 3.5 1.0 2.0 3.0 4.0 400 150 250 50 350 v out = 3.3v v out = 5v v out = 2.5v v out = 1.8v l = 4.7h v in (v) 0.95 10 100 1000 1.05 1.15 3526 g06 load (7) 0.85 1.25 e lec t rical c harac t eris t ics typical p er f ormance c harac t eris t ics
ltc3526/ltc3526b 3526bfd start-up delay time vs v in burst mode threshold current vs v in oscillator frequency change vs v out r ds(on) vs v out oscillator frequency change vs temperature r ds(on) change vs temperature v in (v) 1.0 0 delay (s) 10 30 40 50 100 70 2.0 3.0 3.5 3526 g07 20 80 90 60 1.5 2.5 4.0 4.5 v in (v) 1 0 load current (ma) 5 10 15 20 25 30 1.25 1.5 3526 g08a enter burst leave burst v out = 1.8v c out = 10f l = 4.7h burst mode threshold current vs v in v in (v) 1 load current (ma) 15 20 25 3526 g08b 10 5 0 1.25 1.5 30 35 40 1.75 enter burst leave burst v out = 2.5v c out = 10f l = 4.7h burst mode threshold current vs v in burst mode threshold current vs v in v in (v) 1.0 0 load current (ma) 5 15 20 25 50 35 1.5 2.0 3526 g08c 10 40 45 30 2.5 3.0 enter burst leave burst v out = 3.3v c out = 10f l = 4.7h v in (v) 1.0 load current (ma) 40 50 60 2.5 3.5 3526 g08d 30 20 1.5 2.0 3.0 4.0 4.5 10 0 enter burst leave burst v out = 5v c out = 10f l = 4.7h v out (v) 1.5 frequency change (%) 1 3.0 3526 g09 ?2 ?4 2.0 2.5 3.3 ?5 ?6 2 0 ?1 ?3 4.0 4.5 5.0 normalized to 3.3v v out (v) 1.5 r ds(on) (7) 0.50 0.45 0.80 0.85 0.90 2.5 3.5 4.0 3526 g10 0.35 0.70 0.60 0.40 0.75 0.30 0.65 0.55 2.0 3.0 4.5 5.0 pmos nmos ?50 ?30 ?10 10 30 50 70 90 temperature (c) frequency change (%) 4 6 8 3526 g11 0 ?10 ?8 ?6 10 2 ?2 ?4 normalized to 25c ?50 ?30 ?10 10 30 50 70 90 temperature (c) normalized r ds(on) 1.0 1.1 1.2 3526 g12 0.8 0.7 1.3 0.9 normalized to 25c typical p er f ormance c harac t eris t ics
ltc3526/ltc3526b 3526bfd v fb vs temperature start-up voltage vs temperature fixed frequency switching waveform and v out ripple burst mode waveforms v out and i in during soft-start burst mode current vs v out temperature (c) ?60 ?1.00 change in v fb (%) ?0.75 ?0.50 ?0.25 0 ?20 20 60 100 3526 g13 0.25 0.50 ?40 0 40 80 normalized to 25c ?50 ?30 ?10 10 30 ?50 70 90 temperature (c) v in (v) 0.85 0.90 0.95 3526 g14 0.75 0.70 1.00 0.80 load = 1ma v out (v) 1.5 10.0 9.5 9.0 8.5 8.0 7.5 7.0 3.0 4.0 4.5 3526 g15 2.0 2.5 3.5 5.0 i q (a) sw pin 2v/div 500ns/div v in = 1.2v v out = 3.3v at 100ma c out = 10f 3526 g16 v out 10mv/div ac-coupled sw pin 2v/div inductor current 0.2a/div 10s/div v in = 1.2v v out = 3.3v c out = 10f 3526 g17 v out 20mv/div ac-coupled shdn pin 1v/div input current 0.2a/div 200s/div v out = 3.3v c out = 10f 3526 g18 v out 1v/div load current 50ma/div 100s/div v in = 3.6v v out = 5v 20ma to 170ma step c out = 10f 3526 g19 v out 100mv/div ac-coupled load step response (fixed frequency) load current 50ma/div 100s/div v in = 3.6v v out = 5v 50ma to 150ma step c out = 10f 3526 g20 v out 100mv/div ac-coupled typical p er f ormance c harac t eris t ics load step response (from burst mode operation)
ltc3526/ltc3526b 3526bfd sw (pin 1): switch pin. connect inductor between sw and v in . keep pcb trace lengths as short and wide as possible to reduce emi. if the inductor current falls to zero or shdn is low, an internal anti-ringing switch is connected from sw to v in to minimize emi. gnd (pin 2): signal and power ground. provide a short direct pcb path between gnd and the (C) side of the input and output capacitors. v in (pin 3): input supply pin. connect a minimum of 1f ceramic decoupling capacitor from this pin to ground using short direct pcb traces. shdn (pin 4): logic controlled shutdown input. there is an internal 4m pull-down on this pin. ? shdn = high: normal operation ? shdn = low: shutdown, quiescent current < 1a fb (pin 5): feedback input to the g m error amplifier. con- nect resistor divider tap to this pin. the top of the divider connects to the output capacitor, the bottom of the divider connects to gnd. referring to the block diagram, the output voltage can be adjusted from 1.6v to 5.25v by: v v r r out = + ? ? ? ? ? ? 1 195 1 2 1 . ? v out (pin 6): output voltage sense and drain of the internal synchronous rectifier. pcb trace from v out to the output filter capacitor (4.7f minimum) should be as short and wide as possible. gnd (exposed pad pin 7): the exposed pad must be sol- dered to the pcb ground plane. it serves as an additional ground connection and as a means of conducting heat away from the package. load step response (from burst mode operation) load step response (fixed frequency) load current 50ma/div 100s/div v in = 1.2v v out = 3.3v 50ma to 100ma step c out = 10f 3526 g21 v out 100mv/div ac-coupled load current 50ma/div 50s/div v in = 1.2v v out = 3.3v 5ma to 100ma step c out = 10f 3526 g22 v out 100mv/div ac-coupled typical p er f ormance c harac t eris t ics e lec t rical c harac t eris t ics
ltc3526/ltc3526b 3526bfd 3 + ? + ? gate drivers and anti-cross conduction logic clk i pk i pk comp slope comp i zero comp error amp sleep comp i zero wake exposed pad + ? well switch mode control uvlo v ref v ref 4m shdn v best start-up 1mhz osc tsd thermal shutdown shutdown anti-ring v sel v in 1 6 sw v out l1 4.7h v b shutdown clamp c ss v ref v out 5 7 gnd 3526 bd 2 fb r2 c out 4.7f v out 1.6v to 5.25v r1 4 c in 2.2f v in 0.85v to 5v b lock diagram (refer to block diagram) o pera t ion the ltc3526/ltc3526b are 1mhz synchronous boost converters housed in a 6-lead 2mm 2mm dfn package. with the ability to start up and operate from inputs less than 1v, these devices feature fixed frequency, current mode pwm control for exceptional line and load regula- tion. the current mode architecture with adaptive slope compensation provides excellent transient load response, requiring minimal output filtering. internal soft-start and internal loop compensation simplifies the design process while minimizing the number of external components. with its low r ds(on) and low gate charge internal n-chan- nel mosfet switch and p-channel mosfet synchronous rectifier, the ltc3526 achieves high efficiency over a wide range of load currents. automatic burst mode operation maintains high efficiency at very light loads, reducing the quiescent current to just 9a. operation can be best understood by referring to the block diagram. l ow v oltage s tart -up the ltc3526/ltc3526b include an independent start-up oscillator designed to start up at an input voltage of 0.85v (typical). soft-start and inrush current limiting are provided during start-up, as well as normal mode. when either v in or v out exceeds 1.4v typical, the ic enters normal operating mode. when the output voltage
ltc3526/ltc3526b 3526bfd error amplifier the positive input of the transconductance error amplifier is internally connected to the 1.195v reference and the negative input is connected to fb. clamps limit the mini- mum and maximum error amp output voltage for improved large-signal transient response. power converter control loop compensation is provided internally. an external resistive voltage divider from v out to ground programs the output voltage via fb from 1.6v to 5.25v. v v r r out = + ? ? ? ? ? ? 1 195 1 2 1 . ? current sensing lossless current sensing converts the peak current signal of the n-channel mosfet switch into a voltage that is summed with the internal slope compensation. the summed signal is compared to the error amplifier output to provide a peak current control command for the pwm. current limit the current limit comparator shuts off the n-channel mosfet switch once its threshold is reached. the cur- rent limit comparator delay to output is typically 60ns. peak switch current is limited to approximately 700ma, independent of input or output voltage, unless v out falls below 0.7v, in which case the current limit is cut in half. zero current comparator the zero current comparator monitors the inductor cur- rent to the output and shuts off the synchronous rectifier (refer to block diagram) o pera t ion zetex zc2811e 3526 f01 ltc3526/ltc3526b shdn v in v cntrl 4m 30% ltc3526/ltc3526b shdn 4m 30% 1m r v cntrl 1m r > (v cntrl /(v in + 0.4) ? 1)m figure 1. recommended shutdown circuits when driving shdn above v in exceeds the input by 0.24v, the ic powers itself from v out instead of v in . at this point the internal circuitry has no dependency on the v in input voltage, eliminating the requirement for a large input capacitor. the input voltage can drop as low as 0.5v. the limiting factor for the ap- plication becomes the availability of the power source to supply sufficient energy to the output at low voltages, and maximum duty cycle, which is clamped at 90% typical. note that at low input voltages, small voltage drops due to series resistance become critical, and greatly limit the power delivery capability of the converter. l ow noise fixed frequency o peration soft-start the ltc3526/ltc3526b contain internal circuitry to provide soft-start operation. the soft-start circuitry slowly ramps the peak inductor current from zero to its peak value of 700ma (typical) in approximately 0.5ms, allowing start- up into heavy loads. the soft-start circuitry is reset in the event of a shutdown command or a thermal shutdown. oscillator an internal oscillator sets the switching frequency to 1mhz. shutdown shutdown is accomplished by pulling the shdn pin below 0.3v and enabled by pulling the shdn pin above 0.8v typical. although shdn can be driven above v in or v out (up to the absolute maximum rating) without damage, the ltc3526/ltc3526b have a proprietary test mode that may be engaged if shdn is held in the range of 0.5v to 1v higher than the greater of v in or v out . if the test mode is engaged, normal pwm switching action is interrupted, which can cause undesirable operation in some applications. therefore, in applications where shdn may be driven above v in , a resistor divider or other means must be employed to keep the shdn voltage below (v in + 0.4v) to prevent the possibility of the test mode being engaged. please refer to figure 1 for two possible implementations.
ltc3526/ltc3526b 3526bfd when this current reduces to approximately 30ma. this prevents the inductor current from reversing in polarity, improving efficiency at light loads. synchronous rectifier to control inrush current and to prevent the inductor current from running away when v out is close to v in , the p-channel mosfet synchronous rectifier is only enabled when v out > (v in + 0.24v). anti-ringing control the anti-ringing control connects a resistor across the inductor to prevent high frequency ringing on the sw pin during discontinuous current mode operation. although the ringing of the resonant circuit formed by l and c sw (capacitance on sw pin) is low energy, it can cause emi radiation. output disconnect the ltc3526/ltc3526b are designed to allow true output disconnect by eliminating body diode conduction of the internal p-channel mosfet rectifier. this allows for v out to go to zero volts during shutdown, drawing no current from the input source. it also allows for inrush current limiting at turn-on, minimizing surge currents seen by the input supply. note that to obtain the advantages of output disconnect, there must not be an external schottky diode connected between the sw pin and v out . the output dis- connect feature also allows v out to be pulled high, without any reverse current into a battery connected to v in . thermal shutdown if the die temperature exceeds 160c, the ltc3526/ ltc3526b will go into thermal shutdown. all switches will be off and the soft-start capacitor will be discharged. the device will be enabled again when the die temperature drops by about 15c. burst mode operation the ltc3526 will automatically enter burst mode opera- tion at light load and return to fixed frequency pwm mode when the load increases. refer to the typical performance characteristics to see the output load burst mode thresh- old current vs v in . the load current at which burst mode operation is entered can be changed by adjusting the inductor value. raising the inductor value will lower the load current at which burst mode operation is entered. in burst mode operation, the ltc3526 still switches at a fixed frequency of 1mhz, using the same error amplifier and loop compensation for peak current mode control. this control method eliminates any output transient when switching between modes. in burst mode opera- tion, energy is delivered to the output until it reaches the nominal regulation value, then the ltc3526 transitions to sleep mode where the outputs are off and the ltc3526 consumes only 9a of quiescent current from v out . when the output voltage droops slightly, switching resumes. this maximizes efficiency at very light loads by minimizing switching and quiescent losses. burst mode output voltage ripple, which is typically 1% peak-to-peak, can be reduced by using more output capacitance (10f or greater), or with a small capacitor (10pf to 50pf) connected between v out and fb. as the load current increases, the ltc3526 will automati- cally leave burst mode operation. note that larger output capacitor values may cause this transition to occur at lighter loads. once the ltc3526 has left burst mode operation and returned to normal operation, it will remain there until the output load is reduced below the burst threshold. burst mode operation is inhibited during start-up and soft- start and until v out is at least 0.24v greater than v in . the ltc3526b features continuous pwm operation at 1mhz. at very light loads, the ltc3526b will exhibit pulse-skip operation. (refer to block diagram) o pera t ion
ltc3526/ltc3526b 0 3526bfd v in > v out o peration the ltc3526/ltc3526b will maintain voltage regulation even when the input voltage is above the desired output voltage. note that the efficiency is much lower in this mode, and the maximum output current capability will be less. refer to the typical performance characteristics. s hor t -circuit protection the ltc3526/ltc3526b output disconnect feature allows output short circuit while maintaining a maximum inter- nally set current limit. to reduce power dissipation under short-circuit conditions, the peak switch current limit is reduced to 400ma (typical). s chot tky diode although it is not required, adding a schottky diode from sw to v out will improve efficiency by about 2%. note that this defeats the output disconnect and short-circuit protection features. pcb la yout guidelines the high speed operation of the ltc3526/ltc3526b demands careful attention to board layout. a careless layout will result in reduced performance. figure 2 shows the recommended component placement. a large ground pin copper area will help to lower the die temperature. a multilayer board with a separate ground plane is ideal, but not absolutely necessary. component selection inductor selection the ltc3526/ltc3526b can utilize small surface mount chip inductors due to their fast 1mhz switching frequency. inductor values between 3.3h and 6.8h are suitable for most applications. larger values of inductance will allow slightly greater output current capability (and lower the burst mode threshold) by reducing the inductor ripple cur- rent. increasing the inductance above 10h will increase size while providing little improvement in output current capability. the minimum inductance value is given by: l v v v ripple v in min out max in min out > ( ) ( ) ( ) ( ) ( ? C ? mmax) where: ripple = allowable inductor current ripple (amps peak- peak) v in(min) = minimum input voltage v out(max) = maximum output voltage the inductor current ripple is typically set for 20% to 40% of the maximum inductor current. high frequency ferrite core inductor materials reduce frequency depen- dent power losses compared to cheaper powdered iron types, improving efficiency. the inductor should have low esr (series resistance of the windings) to reduce the i 2 r power losses, and must be able to support the peak figure 2. recommended component placement for single layer board + sw ltc3526 1 gnd minimize trace on fb and sw 2 v in multiple vias to ground plane v in v out fb shdn 3526 f02 3 6 5 4 a pplica t ions i n f orma t ion
ltc3526/ltc3526b 3526bfd inductor current without saturating. molded chokes and some chip inductors usually do not have enough core area to support the peak inductor currents of 700ma seen on the ltc3526/ltc3526b. to minimize radiated noise, use a shielded inductor. see table 1 for suggested components and suppliers. table 1. recommended inductors vendor part/style coilcraft (847) 639-6400 www.coilcraft.com lpo4815 lps4012, lps4018 mss5131 mss4020 mos6020 me3220 ds1605, do1608 coiltronics www.cooperet.com sd10, sd12, sd14, sd18, sd20, sd52, sd3114, sd3118 fdk (408) 432-8331 www.fdk.com mip3226d4r7m, mip3226d3r3m mipf2520d4r7 mipwt3226d3r0 murata (714) 852-2001 www.murata.com lqh43c lqh32c (-53 series) 301015 sumida (847) 956-0666 www.sumida.com cdrh5d18 cdrh2d14 cdrh3d16 cdrh3d11 cr43 cmd4d06-4r7mc cmd4d06-3r3mc taiyo-yuden www.t-yuden.com np03sb nr3015t nr3012t tdk (847) 803-6100 www.component.tdk.com vlp vlf, vlcf toko (408) 432-8282 www.tokoam.com d412c d518lc d52lc d62lcb wrth (201) 785-8800 www.we-online.com we-tpc type s, m output and input capacitor selection low esr (equivalent series resistance) capacitors should be used to minimize the output voltage ripple. multilayer ceramic capacitors are an excellent choice as they have extremely low esr and are available in small footprints. a 4.7f to 10f output capacitor is sufficient for most applications. larger values up to 22f may be used to obtain extremely low output voltage ripple and improve transient response. x5r and x7r dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. y5v types should not be used. the internal loop compensation of the ltc3526 is designed to be stable with output capacitor values of 4.7f or greater (without the need for any external series resistor). although ceramic capacitors are recommended, low esr tantalum capacitors may be used as well. a small ceramic capacitor in parallel with a larger tantalum capacitor may be used in demanding applications that have large load transients. another method of improving the transient response is to add a small feed-forward capacitor across the top resistor of the feedback divider (from v out to fb). a typical value of 22pf will generally suffice. low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. it follows that ceramic capacitors are also a good choice for input decoupling and should be located as close as possible to the device. a 2.2f input capacitor is sufficient for most applications, although larger values may be used without limitations. table 2 shows a list of several ceramic capacitor manufacturers. consult the manufactur- ers directly for detailed information on their selection of ceramic capacitors. table 2. capacitor vendor information supplier phone website avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com taiyo-yuden (408) 573-4150 www.t-yuden.com tdk (847) 803-6100 www.component.tdk.com samsung (408) 544-5200 www.sem.samsung.com a pplica t ions i n f orma t ion
ltc3526/ltc3526b 3526bfd 1-cell to 1.8v converter with <1mm maximum height 1-cell to 2.85v converter 1-cell to 3.3v sw v in 1.78m 4.7h 1m 1f 4.7f 3526 ta01a ltc3526 shdn v out fb v in 1.6v to 3.2v v out 3.3v 200ma off on gnd sw v in 1.4m 4.7h* 1m *sumida cdrh3d16-4r7 1f 10f 3526 ta03a ltc3526 shdn v out fb v in 1v to 1.6v v out 2.85v 100ma off on gnd sw v in 1.78m 4.7h* 1m *taiyo-yuden np03sb4r7m 1f 10f 22pf 3526 ta04a ltc3526 shdn v out fb v in 1v to 1.6v v out 3.3v 75ma off on gnd load current (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 10 100 1000 3526 ta02b 30 20 10 0 90 100 v in = 1.5v v in = 1.2v v in = 0.9v v out = 1.8v load current (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 10 100 1000 3526 ta03b 30 20 10 0 90 100 v in = 1.5v v in = 1.2v v in = 0.9v v out = 2.85v load current (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 10 100 1000 3526 ta04b 30 20 10 0 90 100 v in = 1.5v v in = 1.2v v in = 0.9v v out = 3.3v typical a pplica t ions
ltc3526/ltc3526b 3526bfd 2-cell to 3.3v sw v in 1.78m 4.7h* 1m *taiyo-yuden np03sb4r7m 1f 4.7f 3526 ta05a ltc3526 shdn v out fb v in 2v to 3.2v v out 3.3v 200ma off on gnd load current (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 10 100 1000 3526 ta05b 30 20 10 0 90 100 v in = 3.0v v in = 2.4v v in = 1.8v v out = 3.3v typical a pplica t ions 2-cell to 5v sw v in 3.24m 6.8h* 1.02m *taiyo-yuden np03sb6r8m 1f 10f 22pf 3526 ta06a ltc3526 shdn v out fb v in 2v to 3.2v v out 5v 150ma off on gnd load current (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 10 100 1000 3526 ta06b 30 20 10 0 90 100 v in = 3.0v v in = 2.4v v in = 1.8v v out = 5v li-ion to 5v sw v in 3.24m 6.8h* 1.02m *taiyo-yuden np03sb6r8m 1f 10f 22pf 3526 ta08a ltc3526 shdn v out fb v in 2.7v to 4.3v v out 5v 200ma off on gnd load current (ma) 0.01 40 efficiency (%) 50 60 70 80 0.1 1 10 100 1000 3526 ta08b 30 20 10 0 90 100 v in = 4.2v v in = 3.6v v in = 3.0v v out = 5v
ltc3526/ltc3526b 3526bfd p ackage descrip t ion 2.00 p0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (wccd-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 p 0.10 bottom view?exposed pad 0.56 p 0.05 (2 sides) 0.75 p0.05 r = 0.125 typ r = 0.05 typ 1.37 p0.05 (2 sides) 1 3 64 pin 1 bar top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dc6) dfn rev b 1309 0.25 p 0.05 0.50 bsc 0.25 p 0.05 1.42 p0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 p0.05 (2 sides) 1.15 p0.05 0.70 p0.05 2.55 p0.05 package outline 0.50 bsc pin 1 notch r = 0.20 or 0.25 s 45o chamfer dc package 6-lead plastic dfn (2mm s 2mm) (reference ltc dwg # 05-08-1703 rev b)
ltc3526/ltc3526b 3526bfd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology c orporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number d 9/10 updated ja on pin configuration updated note 6 updated shutdown section updated related parts 2 3 8 16 (revision history begins at rev d)
ltc3526/ltc3526b 3526bfd linear technology corporation 1630 mc c arthy blvd., milpitas, c a 95035-7417 (408) 432-1900 l fax : (408) 434-0507 l www.linear.com ? linear technology corporation 2006 lt 0910 ? rev d ? printed in usa 3.3v converter with output ord with 5v usb input sw v in 1.78m 4.7h 1m 1f mbr120esft 10f 3526 ta07a ltc3526 shdn v out fb v batt 1.8v to 3.2v 5v usb v out 3.3v/5v usb off on gnd ldo dc/dc r ela t e d p ar t s part number description comments ltc3526-2/ltc3526b-2 ltc3526l/ltc3526lb ltc3526l-2/ltc3526lb-2 500ma, 1mhz/2.2mhz, synchronous step-up dc/dc converters with output disconnect 94% efficiency v in : 0.85v to 5v, v out(max) = 5.25v, i q = 9a, i sd < 1a, 2mm 2mm dfn-6 package ltc3525l-3 400ma micropower synchronous step-up dc/dc converter with output disconnect 93% efficiency v in : 0.88v to 4.5v, v out = 3v, i q = 7a, i sd < 1a, sc-70 package ltc3525-3 ltc3525-3.3 ltc3525-5 400ma micropower synchronous step-up dc/dc converter with output disconnect 95% efficiency v in : 1v to 4.5v, v out(max) = 3.3v or 5v, i q = 7a, i sd < 1a, sc-70 package ltc3427 500ma i sw , 1.2mhz, synchronous step-up dc/dc converter with output disconnect 93% efficiency v in : 1.8v to 4.5v, v out(max) = 5v, 2mm 2mm dfn package ltc3400/LTC3400B 600ma i sw , 1.2mhz, synchronous step-up dc/dc converters 92% efficiency v in : 1v to 5v, v out(max) = 5v, i q = 19a/300a, i sd < 1a, thinsot? package ltc3527/ltc3527-1 dual 600ma/400ma i sw , 1.2mhz/2.2mhz synchronous step-up dc/dc converters 94% efficiency v in : 0.7v to 5v, v out(max) = 5.25v, i q = 12a, i sd < 1a, 3mm 3mm qfn-16 package typical a pplica t ion

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